Neuromorphic synaptic rewiring for topographic map development (2006-2009)

A chip I designed during my PhD (right), alongside a commercial chip (left) For my PhD at the University of Edinburgh I worked on an alternative method for delivering events within neuromorphic systems made of many silicon chips. The events represent spikes (the electrical pulses that brain cells use to communicate with each other). These events were broadcast across each chip and could be received simultaneously by many synapses (the connections between neurons) - this reduced a speed bottleneck present in other designs.

I also implemented the formation and elimination of synapses (a process which happens continuously in our brains, known as "synaptic rewiring"). I then used synaptic rewiring to model the development of topographic maps (ordered sets of connections between different brain areas).

As a learning rule, the model used a type of spike-timing-dependent plasticity (STDP). I created an analogue silicon circuit to emulate this learning rule, which allowed some control of the weight-dependence of the plasticity. A serendipitous result that emerged was that the learning rule automatically provided some compensation for inhomogenities in the chip design.

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The above article was the subject of an editorial for that issue: pdf

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